SPRINT - Open SoC Design Platform for Reuse and Integration of IPs (FP6-IST) (2006-02-01 - 2008-07-31) (»add to infobox)

Pieter WOLF VAN DER, Alain CLOUARD, Serge HUSTIN, N. N., Wojtek SAKOWSKI, Peter JENSEN, Emmanuel VAUMORIN, Wolfgang MUELLER, Jean MERMET, Frederic PETROT, Marleen BOONEN, Axel JANTSCH, Muhammed Mutaher Kamal HASHMI, Adam MORAWIEC, John GOODENOUGH, Stephan LAUTERBACH, N. N.

PHILIPS ELECTRONICS NEDERLAND B.V. (NL414 - Zuidoost-Noord-Brabant) (Netherlands), STMICROELECTRONICS SA (FR105 - Hauts-de-Seine) (France), STMICROELECTRONICS BELGIUM N.V. (BE241 - Arr. Halle-Vilvoorde) (Belgium), INFINEON TECHNOLOGIES AG (DE21H - München, Landkreis) (Germany), EVATRONIX SPOLKA AKCYJNA (PL225 - Bielsko-bialski) (Poland), SYOSIL CONSULTING V / PETER JENSEN (DK003 - Frederiksborg amt) (Denmark), PROSILOG SA (FR108 - Val-d'Oise) (France), UNIVERSITY OF PADERBORN (DEA47 - Paderborn) (Germany), KEESDA - KNOWLEDGE ENVIRONNEMENT FOR ELECTRONIC SYSTEMS DESIGN AUTOMATION (FR714 - Isère) (France), ASSOCIATION POUR LE DEVELOPPEMENT DES RECHERCHES AUPRES DES UNIVERSITES DE L'ACADEMIE DE GRENOBLE (ADR) (FR714 - Isère) (France), NXP SEMICONDUCTORS NETHERLANDS B.V. (NL414 - Zuidoost-Noord-Brabant) (Netherlands), ROYAL INSTITUTE OF TECHNOLOGY (SE010 - Stockholms län) (Sweden), SPIRATECH LIMITED (UKD31 - Greater Manchester South) (Great Britain), EUROPEAN ELECTRONIC CHIPS & SYSTEMS DESIGN INITIATIVE (FR714 - Isère) (France), ARM LIMITED (UKH12 - Cambridgeshire CC) (Great Britain), LAUTERBACH DATENTECHNIK GMBH (DE21H - München, Landkreis) (Germany), SYOSIL APS (DK00 - Danmark) (Denmark)

The integration densities offered by nanoscale process technologies enable the development of advanced Systems-on-Chip (SoC).These SoCs are the key building blocks for a broad range of innovative end-products. The complexity of developing advanced SoCs is increasing continuously and development costs are becoming a serious threshold for new product developments. The SPRINT consortium will perform a rigorous integrated research activity to obtain a breakthrough in technology for reuse and integration of IP modules within and across companies, so that IP from various sources can be combined quickly and efficiently.The key SPRINT objectives are: 1. To align the approaches of the European key players in the SoC domain towards IP reuse and to drive the identification and development of open interface standards for IP integration. 2. To create an open SoC design platform, consisting of standards and a SoC design methodology, with matching tools and IP modules. Such design platform provides the basis for SoC design environments that support the efficient development and integration of interoperable and reusable IP modules, including debug and verification of SoCs. 3. To enable European companies to be the first in the world to demonstrate and subsequently exploit the new standards-based SoC design environments in an interoperable way in order to improve on design productivity and the quality in SoC design. The SPRINT project will address a broad range of research topics to establish the paradigm shift that will boost the design productivity and quality of SoC design. The project will be user driven and include concrete design activities for generating detailed requirements and for evaluating the standards and design technology developed. The standards-based open SoC design platform will enable a SoC design ecosystem in which IPs and tools can be exchanged easily to the benefit of SoC integrators, IP providers and EDA vendors.

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