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PROSYD - Property-Based System Design (FP6-IST) (2004-01-01 - 2006-12-31)
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Daniel GEIST,
Michael SIEGEL,
Marco ROVERI,
Andrea FEDELI,
Roderick BLOEM,
Oded MALER,
Amir PNUELI,
Harry FOSTER,
Anthony MCISAAC,
N. N.,
N. N.,
N. N.
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IBM ISRAEL - SCIENCE AND TECHNOLOGY LTD (IL - Israel) (Israel),
INFINEON TECHNOLOGIES AG (DE21H - München, Landkreis) (Germany),
ISTITUTO TRENTINO DI CULTURA (ITD20 - Trento) (Italy),
STMICROELECTRONICS S.R.L. (ITC45 - Milano) (Italy),
TECHNISCHE UNIVERSITAET GRAZ (AT221 - Graz) (Austria),
UNIVERSITE JOSEPH FOURIER GRENOBLE 1 (FR714 - Isère) (France),
WEIZMANN INSTITUTE OF SCIENCE (ME04 - Israel) (Israel),
ACCELLERA ORGANIZATION (US - United States of America) (United States of America),
STMICROELECTRONICS LIMITED (UKJ13 - Buckinghamshire CC) (Great Britain),
STMICROELECTRONICS SA (FR105 - Hauts-de-Seine) (France),
ONESPIN SOLUTIONS GMBH (DE212 - München, Kreisfreie Stadt) (Germany),
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS) (FR101 - Paris) (France) |
| ACRONYM: | PROSYD |
| BUDGET: | 7.023.969 € |
| FUNDING: | 4.020.000 € |
| INSTRUMENT: | Specific Targeted Project |
| PROGRAMME: | FP6-IST |
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The goal of the PROSYD project is to significantly increase the competitiveness and efficiencyof the European IT industry through the establishment of a standard, integrated property-based paradigm for the design of electronic systems. This paradigm will integrate and unifythe many phases of system development, including requirement definition, design,implementation, and verification, into one coherent design flow, building on the emergingstandard property specification language PSL/Sugar, which has been recently selected as abasis for an IEEE standard. The new paradigm will enable the development of electronicsystems of higher quality within shorter design cycles and with lower costs.The prime deliverable of the PROSYD project will be a reference methodology and a set ofcoherent PSL/Sugar-based tools for property-based system design. Using these tools, weaim to demonstrate an improvement of at least 30% in design productivity. In addition, weexpect to see an increase in the quality of the finished product, resulting in a significantdecrease in the number of design flaws that make it through the verification phase.
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| PERSONS (12/12) |
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Daniel GEIST (Contact / IBM ISRAEL - SCIENCE AND TECHNOLOGY LTD (IL - Israel) (Israel))
Michael SIEGEL (Contact / INFINEON TECHNOLOGIES AG (DE21H - München, Landkreis) (Germany))
Marco ROVERI (Contact / ISTITUTO TRENTINO DI CULTURA (ITD20 - Trento) (Italy))
Andrea FEDELI (Contact / STMICROELECTRONICS S.R.L. (ITC45 - Milano) (Italy))
Roderick BLOEM (Contact / TECHNISCHE UNIVERSITAET GRAZ (AT221 - Graz) (Austria))
Oded MALER (Contact / UNIVERSITE JOSEPH FOURIER GRENOBLE 1 (FR714 - Isère) (France))
Amir PNUELI (Contact / WEIZMANN INSTITUTE OF SCIENCE (ME04 - Israel) (Israel))
Harry FOSTER (Contact / ACCELLERA ORGANIZATION (US - United States of America) (United States of America))
Anthony MCISAAC (Contact / STMICROELECTRONICS LIMITED (UKJ13 - Buckinghamshire CC) (Great Britain))
N. N. (Contact / STMICROELECTRONICS SA (FR105 - Hauts-de-Seine) (France))
N. N. (Contact / ONESPIN SOLUTIONS GMBH (DE212 - München, Kreisfreie Stadt) (Germany))
N. N. (Contact / CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS) (FR101 - Paris) (France))
| RELATED NAVIGATION AREA(S) (1/1) |
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FP6 Information society technologies
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